被围观了 11,671 次

移植涉及如下文件:
1、Makefile                           -----修改源码树根部的Makefile中的ARCH和CROSS_COMPILE变量的值
2、arch/arm/mach-pxa/Kconfig     ----添加内核配置项
3、arch/arm/mach-pxa/Makefile    ----添加编译项
4、arch/arm/mach-pxa/Makefile.boot   ----检查里面的链接地址是不是0xa0008000
5、arch/arm/mach-pxa/xsbase270.c     -----新增此文件
6、arch/arm/mach-pxa/include/mach/xsbase270.h     ----新增此文件
7、arch/arm/mach-pxa/include/mach/irqs.h     -----增加中断向量表
8、drivers/mtd/maps/xsbase270-flash.c      ----新增此文件
9、drivers/mtd/maps/Kconfig     ----添加内核配置项
10. drivers/mtd/maps/Makefile      ---添加编译项
11. arch/arm/configs/xsbase270_defconfig    ----新增文件
12. arch/arm/tools/mach-types    ----检查里面的MACH_TYPE_XSBASE270宏定义1141

 

第一部分、准备工作

1、创建必要的目录
# mkdir -p /usr/local/arm/{tars, source/BUILD/linux-2.6.28}

2、准备工具链
解压到目录/usr/local/arm/4.2.1下,同时把目录/usr/local/arm/4.2.1/bin追加到PATH环境变量中:
# export PATH=$PATH: /usr/local/arm/4.2.1/bin

3、备好Linux-2.6.28源码
# cd /usr/local/arm/tars
# wget http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.28.tar.bz2
# cd /usr/local/arm/source
# tar -jxf ../tars/linux-2.6.28.tar.bz2
# cd linux-2.6.28

4、试编译内核
# make O=../BUILD/linux-2.6.28 allnoconfig
# make O=../BUILD/linux-2.6.28 bzImage

第二部分、配置

1、修改内核源码书顶层目录下的Makefile
# vim  Makefile

ARCH  ?= $(SUBARCH)
CROSS_COMPILE ?=

改为

ARCH  ?= arm
CROSS_COMPILE ?=arm-linux-

相当于指定CPU的架构(arm)和交叉编译工具链的前缀。

 

2、增加一个内核配置菜单项(Make menuconfig)
# vim arch/arm/mach-pxa/Kconfig     ---找到MAINSTONE,在其下方添加


config MACH_XSBASE270
bool "Emdoor EEliod/Liod Development Platform"
select PXA27x
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS

3、修改Makefile文件,增加编译xsbase270.c的项
---xsbase270.c是在“第三部分:源码移植 ”新增加的源程序
# vim arch/arm/mach-pxa/Makefile

……
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_MACH_XSBASE270) += xsbase270.o
……

在灰色那一行下面增加红色部分,即表示如果在配置内核时选择了XSBASE270开发板,就编译xsbase270.c

4、添加flash驱动的内核配置菜单项和编译目标

---在 “第三部分:源码移植 ”新增加flash驱动drivers/mtd/maps/xsbase270-flash.c
# vim drivers/mtd/maps/Kconfig

……
config MTD_COMPLEX_MAPPINGS
bool "Support non-linear mappings of flash chips"
help
This causes the chip drivers to allow for complicated
paged mappings of flash chips.

config MTD_XSBASE270
tristate "CFI Flash device mapped on Emdoor XSABSE270 eval board"
depends on (PXA25x || PXA27x) && MACH_XSBASE270 && MTD_CFI_INTELEXT

select MTD_PARTITIONS
help
This provides a driver for the on-board flash of the Intel Emdoor PXA27x evaluation board.

……

在灰色部分下面增加红色部分


# vim drivers/mtd/maps/Makefile

……
obj-$(CONFIG_MTD_PXA2XX) += pxa2xx-flash.o
obj-$(CONFIG_MTD_XSBASE270) += xsbase270-flash.o

……

 

在灰色那一行下面增加红色部分

5、生成基于XSBASE270的内核配置默认项文件
# cp arch/arm/configs/{mainstone_defconfig, xsbase270_defconfig}

xsbase270_defconfig文件的格式就是内核的配置文件.config格式,在本文“第五部分、编译内核”中,配置内核的命令 make O=../build xsbase270_defconfig menuconfig,就是先拷贝xsbase270_defconfig的选择项到.config,然后再进入配置菜单,之后您会发现大部分配置项都是需要的,只要微调一下即可。当然可以手工直接拷贝arch/arm/configs/xsbase270_defconfig到内核源码树根下../build/.config,然后直接用vim去修改../build/.config。

6、确保机器码与u-boot的一致
文件arch/arm/tools/mach-types中定义的机器码是在编译内核时自动产生的,比如我们的开发板对应其中一行:

xsbase270       MACH_XSBASE270      XSBASE270       1141

u-boot源码树下的文件include/asm-arm/mach-types.h中有一行宏定义如下:

#define MACH_TYPE_XSBASE270            1141

机器码1141要一致,否则从u-boot中调用内核会报错,见附录1。

7、确认内核链接地址
亿道XSBASE270开发板内存大小时64MB,起始地址是0xa0000000,前32kb保留为页表,从0xa0008000开始放置内核,所以内核的链接地址是0xa0008000,检查文件arch/arm/mach-pxa/Makefile.boot中定义的链接地址是否正确。

第三部分、源码移植

1、增加xsbase270的主程序xsbase270.c文件

在arch/arm/mach-pxa目录下增加一个c语言源程序xsbase270.c(拷贝该目录下的mainstone.c,然后根据实际平台进行修改)。

 

/*

*  linux/arch/arm/mach-pxa/xsbase270.c
*
*  Support for Emdoor EELIOD (XSBASE270edr) board
*
*  Author: Nicolas Pitre
*  Created: Nov 05, 2002
*  Copyright: MontaVista Software Inc.
*
*  modified from linux/arch/arm/mach-pxa/mainstone.c
*  by Adam Ward (adam.ward@intel.com) in 2005
*
*  This program is free software; you can redistribute it and/or modify
*  it under the terms of the GNU General Public License version 2 as
*  published by the Free Software Foundation.
*/

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/fb.h>
#include <linux/ioport.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/pwm_backlight.h>
#include <linux/smc91x.h>

#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/sizes.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>

#include <mach/pxa-regs.h>
#include <mach/pxa2xx-regs.h>
//#include <mach/mfp-pxa27x.h>
#include <mach/xsbase270.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
#include <mach/i2c.h>
#include <mach/mmc.h>
#include <mach/irda.h>
#include <mach/ohci.h>
#include <mach/pxa27x_keypad.h>

#include <mach/hardware.h>
#include <mach/pxa2xx-gpio.h>

#include "generic.h"
#include "devices.h"
/*
static unsigned long xsbase270_pin_config[] = {
// Chip Select
//GPIO15_nCS_1,

// BTUART
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
//        GPIO44_BTUART_CTS,
//       GPIO45_BTUART_RTS,

// FFUART
GPIO34_FFUART_RXD,
GPIO39_FFUART_TXD,

// STUART
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,

// LCD - 16bpp Active TFT
GPIO58_LCD_LDD_0,
GPIO59_LCD_LDD_1,
GPIO60_LCD_LDD_2,
GPIO61_LCD_LDD_3,
GPIO62_LCD_LDD_4,
GPIO63_LCD_LDD_5,
GPIO64_LCD_LDD_6,
GPIO65_LCD_LDD_7,
GPIO66_LCD_LDD_8,
GPIO67_LCD_LDD_9,
GPIO68_LCD_LDD_10,
GPIO69_LCD_LDD_11,
GPIO70_LCD_LDD_12,
GPIO71_LCD_LDD_13,
GPIO72_LCD_LDD_14,
GPIO73_LCD_LDD_15,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
GPIO77_LCD_BIAS,
GPIO16_PWM0_OUT,        // Backlight

// MMC
GPIO32_MMC_CLK,
GPIO112_MMC_CMD,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,

// USB Host Port 1
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,

// PC Card
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO79_PSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,

// AC97
GPIO45_AC97_SYSCLK,

// Keypad
GPIO93_KP_DKIN_0,
GPIO94_KP_DKIN_1,
GPIO95_KP_DKIN_2,
GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
GPIO97_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
GPIO98_KP_MKIN_4        | WAKEUP_ON_LEVEL_HIGH,
GPIO99_KP_MKIN_5        | WAKEUP_ON_LEVEL_HIGH,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
GPIO106_KP_MKOUT_3,
GPIO107_KP_MKOUT_4,
GPIO108_KP_MKOUT_5,
GPIO96_KP_MKOUT_6,

GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
};
*/
extern unsigned long xsbase270edr_bcr= 0x000003c0;

static struct resource flash_resources = {
.start  = PXA_CS0_PHYS,
.end    = PXA_CS0_PHYS + SZ_32M - 1,
.flags  = IORESOURCE_MEM,
};

static struct mtd_partition xsbase270flash_partitions[] = {
{
.name =         "boot",
.size =         0x00040000,
.offset =       0,
.mask_flags =   MTD_WRITEABLE  /* force read-only */
},{
.name =         "param",
.size =         0x00040000,
.offset =       0x00040000,
},{
.name =         "Kernel",
.size =         0x00300000,
.offset =       0x00080000,
},{
.name =         "rootfs",
.size =         0x00f00000,
.offset =       0x00380000,
},{
.name =         "appfs",
.size =         MTDPART_SIZ_FULL,
.offset =       0x01280000
,

}
};
static struct flash_platform_data xsbase270_flash_data = {
.map_name       = "cfi_probe",
.parts          = xsbase270flash_partitions,
.nr_parts       = ARRAY_SIZE(xsbase270flash_partitions),
};

static struct platform_device xsbase270_flash_device = {

.name           = "pxa2xx-flash",
.id             = 0,
.dev = {
.platform_data = &xsbase270_flash_data,
},
.resource = &flash_resources,
.num_resources = 1,
};

static void __init xsbase270_init_irq(void)
{
pxa27x_init_irq();
pxa_gpio_mode(22 | GPIO_IN);
set_irq_type(XSBEDR_CF_IRQ, IRQ_TYPE_EDGE_RISING);

pxa_gpio_mode(10);// | GPIO_IN);
set_irq_type(IRQ_GPIO(10), IRQ_TYPE_EDGE_RISING);

pxa_gpio_mode(13 | GPIO_IN);
set_irq_type(XSBDVK_AC97_IRQ, IRQ_TYPE_EDGE_RISING);

pxa_gpio_mode(12 | GPIO_IN);
set_irq_type(XSBEDR_CF_DETECT_IRQ,IRQ_TYPE_EDGE_BOTH);
}

static int xsbase270_mci_init(struct device *dev, irq_handler_t xsb_detect_int, void *data)
{
unsigned long status;//,flip;
int err;

pxa_gpio_mode(GPIO32_MMCCLK_MD);
pxa_gpio_mode(GPIO112_MMCCMD_MD);
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
pxa_gpio_mode(GPIO111_MMCDAT3_MD);

status=XSBEDR_STATUS & 0x01fff;
if(status & XSBEDR_STATUS_MMC_DETECT)
{
err = request_irq(XSBEDR_CF_DETECT_IRQ, xsb_detect_int, IRQF_DISABLED,
"MMC card detect", data);
if (err) {
printk(KERN_ERR "xsb_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
return -1;
}
}
return 0;
}

static void xsbase270_mci_setpower(struct device *dev,unsigned int vdd)
{
struct pxamci_platform_data *p_d=dev->platform_data;
if((1<<vdd)&p_d->ocr_mask){
XSBEDR_MMC_PWR_ON;
}
else {
XSBEDR_MMC_PWR_ON;
}
}

static void xsbase270_mci_exit(struct device *device,void *data)
{
free_irq(XSBEDR_CF_DETECT_IRQ,data);
}

static struct pxamci_platform_data xsbase270_mci_platform_data= {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init =xsbase270_mci_init,
.detect_delay =1,
.setpower = xsbase270_mci_setpower,
.exit =xsbase270_mci_exit,
};


static struct resource smc91x_resources[] = {
[0] = {
.start = (XSBEDR_ETH_PHYS + 0x300),
.end = (XSBEDR_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start =IRQ_GPIO(10),// XSBDVK_ETH_IRQ,
.end = IRQ_GPIO(10),//XSBDVK_ETH_IRQ,
.flags = IORESOURCE_IRQ,
}
};
static struct smc91x_platdata xsbase270_smc91x_info = {
.flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
};

static struct platform_device smc91x_device = {
.name  = "smc91x",
.id  = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev            = {
.platform_data = &xsbase270_smc91x_info,
},

};

static int xsbase270_audio_startup(struct snd_pcm_substream *substream, void *priv)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
{
xsbase270edr_bcr &= ~XSBEDR_BCR_SPKR_OFF;
xsbase270edr_bcr |=XSBEDR_BCR_AUDIO_PWR_ON;
XSBEDR_BCR=xsbase270edr_bcr;
}
return 0;
}
static void xsbase270_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
xsbase270edr_bcr |= XSBEDR_BCR_SPKR_OFF;
xsbase270edr_bcr &= ~XSBEDR_BCR_AUDIO_PWR_ON;
XSBEDR_BCR=xsbase270edr_bcr;
}
static long xsbase270_audio_suspend_mask;
static void xsbase270_audio_suspend(void *priv)
{
xsbase270_audio_suspend_mask = XSBEDR_BCR;
xsbase270edr_bcr |= XSBEDR_BCR_SPKR_OFF;
xsbase270edr_bcr &= ~XSBEDR_BCR_AUDIO_PWR_ON;
XSBEDR_BCR=xsbase270edr_bcr;
}

static void xsbase270_audio_resume(void *priv)
{
xsbase270_audio_suspend_mask |= ~XSBEDR_BCR_SPKR_OFF;//~MST_MSCWR2_AC97_SPKROFF;
xsbase270_audio_suspend_mask &= XSBEDR_BCR_AUDIO_PWR_ON;//~MST_MSCWR2_AC97_SPKROFF;
XSBEDR_BCR &=xsbase270_audio_suspend_mask;
}

static pxa2xx_audio_ops_t xsbase270_audio_ops = {
.startup        = xsbase270_audio_startup,
.shutdown       = xsbase270_audio_shutdown,
.suspend        = xsbase270_audio_suspend,
.resume         = xsbase270_audio_resume,
};
static struct platform_device xsbase270_audio_device = {
.name           = "pxa2xx-ac97",
.id             = -1,
.dev            = { .platform_data = &xsbase270_audio_ops },
};

static struct platform_device *platform_devices[] __initdata = {
&smc91x_device,
&xsbase270_audio_device,
&xsbase270_flash_device,
};
static int xsbase270_ohci_init(struct device *dev)
{
/* setup Port1 GPIO pin. */
pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN);  /* USBHPWR1 */
pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */

/* Set the Power Control Polarity Low and Power Sense
Polarity Low to active low. */
/* UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
*/
return 0;
}

static struct pxaohci_platform_data xsbase270_ohci_platform_data = {
.port_mode      = PMM_PERPORT_MODE,
.init           = xsbase270_ohci_init,
.flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,

};

static void xsbase270_backlight_power(int on)
{
if (on) {
XSBEDR_LCD_PWR_ON;

} else {
XSBEDR_LCD_PWR_OFF;
}

}

static struct pxafb_mode_info lb064v02_mode __initdata = {
#ifdef CONFIG_MACH_XSBASE270Liod
.pixclock  = 50000,//500000,
#else
.pixclock  = 400000,
#endif
.xres   = 640,
.xres   = 640,
.yres   = 480,
.bpp   = 16,
.hsync_len  = 48,
#ifdef CONFIG_MACH_XSBASE270Liod
.left_margin  = 90,
.right_margin  = 10,
#else
.left_margin  = 56,
.right_margin  = 15,
#endif
.vsync_len  = 3,
.upper_margin  = 33,
.lower_margin  = 10,
.sync   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
};

static struct pxafb_mach_info xsbase270_pxafb_info = {
.num_modes              = 1,
.lccr0                  = LCCR0_Act,
.lccr3                  = LCCR3_PCP,
.lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.pxafb_backlight_power  = xsbase270_backlight_power,
};

static void __init xsbase270_init(void)
{
/*
struct rtc_time wtime;
wtime=get_rtc4513_time();
xtime.tv_sec=mktime(wtime.tm_year,wtime.tm_mon,wtime.tm_mday,wtime.tm_hour,wtime.tm_min,wtime.tm_sec);
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
// pxa2xx_mfp_config(ARRAY_AND_SIZE(xsbase270_pin_config));

pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);

platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

xsbase270_pxafb_info.modes=&lb064v02_mode;
set_pxa_fb_info(&xsbase270_pxafb_info);

pxa_set_ohci_info(&xsbase270_ohci_platform_data);

pxa_set_mci_info(&xsbase270_mci_platform_data);
}
static struct map_desc xsbase270_io_desc[] __initdata = {
{
.virtual =XSBEDR_FPGA_VIRT,
.pfn  =__phys_to_pfn(XSBEDR_FPGA_PHYS),
.length  =0x00100000,
.type  =MT_DEVICE
}, /* CPLD */
{
.virtual =0xF7000000,
.pfn  =__phys_to_pfn(0x10700000),
.length  =0x00100000,
.type  =MT_DEVICE
},   /*rtc*/

};

static void __init xsbase270_map_io(void)
{
pxa_map_io();
iotable_init(xsbase270_io_desc, ARRAY_SIZE(xsbase270_io_desc));

}

MACHINE_START(XSBASE270, "EELIOD (XSBASE270EDR) Development Platform")
.phys_io        = 0x40000000,
.boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
.io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io         = xsbase270_map_io,
.init_irq       = xsbase270_init_irq,
.timer          = &pxa_timer,
.init_machine   = xsbase270_init,

MACHINE_END

 

2、增加一个头文件xsbase270.h

在arch/arm/mach-pxa/include/mach目录编辑这个头文件。

 

/*
*  linux/include/asm-arm/arch-pxa/XSBEDRase270edr.h
*
*  Modified from linux/include/asm-arm/arch-pxa/mainstone.h
*  for Sandgate2 board by Adam Ward
*
*  Copyright 2005 (c) Intel Corporation
*
*  Orignal Author: Nicolas Pitre
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/

 

#ifndef __ASSEMBLY__
extern unsigned long xsbase270edr_bcr;
#endif

#define XSBEDR_FPGA_PHYS (0x0A000000)  /* PXA_CS2_PHYS  and A25=1*/
#define XSBEDR_FPGA_VIRT (0xf0000000) /* phys 0x08000000 */
#define XSBEDR_ETH_PHYS PXA_CS3_PHYS


#define XSBEDR_P2V(x)  ((x) - XSBEDR_FPGA_PHYS + XSBEDR_FPGA_VIRT)
#define XSBEDR_V2P(x)  ((x) - XSBEDR_FPGA_VIRT + XSBEDR_FPGA_PHYS)

#ifndef __ASSEMBLY__
#  define __XSBEDR_REG(x)  (*((volatile unsigned long *)XSBEDR_P2V(x)))
#else
#  define __XSBEDR_REG(x)  XSBEDR_P2V(x)
#endif

/* XSBEDRASE270EDR   BCR (Board Control Register) */

#define XSBEDR_BCR   __XSBEDR_REG((XSBEDR_FPGA_PHYS + 0x00000000))

#define XSBEDR_BCR_CF_PWR_ON 0x00000001 // cf power enable
#define XSBEDR_BCR_CF_RESET 0x00000002 // cf/daughter card reset
#define XSBEDR_BCR_IRDA_FSEL 0x00000004 // irda frequency select
#define XSBEDR_BCR_IRDA_MD0 0x00000008 // irda module MD0 0=low, 1=high
#define XSBEDR_BCR_IRDA_MD1 0x00000010 // irda module MD1 0=low, 1=high
#define XSBEDR_BCR_nCF_BUS_ON 0x00000020 // cf bus enable 0=ena, 1=disable
#define XSBEDR_BCR_AUDIO_PWR_ON 0x00000040 // audio power enable 0=off,1=on
#define XSBEDR_BCR_CPLD_IN  0x00000080 // cpld input enable 0=low
#define XSBEDR_BCR_LCD_PWR_ON 0x00000100 // lcd power enable 0=off,1=on
#define XSBEDR_BCR_RS232ON  0x00000200 // rs232 enable 0=dis,1=ena
#define XSBEDR_BCR_PSKTSEL  0x00000400 // PCMCIA socket sel
#define XSBEDR_BCR_EOT  0x00000800 // USB ctrlr EOT, 0=low,1=high
#define XSBEDR_BCR_REDLED  0x00001000 // red LED, 0=on 1=off
#define XSBEDR_BCR_GRNLED  0x00002000 // green LED, 0=on 1=off
#define XSBEDR_BCR_SPKR_OFF 0x00004000 // audio amp enable 0=off,1=on
#define XSBEDR_BCR_MMC_PWR_ON 0x00008000 // mmc power enable 0=off,1=on
#define XSBEDR_BCR_MS_PWR_ON 0x00010000 // mem stick power 0=off,1=on
#define XSBEDR_BCR_MBREQ_EN 0x00020000 // ext board mbreq  0=notuse 1=use
#define XSBEDR_BCR_SRESET  0x00040000 // usb2ctrlr reset 1=assert
#define XSBEDR_BCR_VBUS1_ON 0x00080000 // usb1.1slave pullup 1=on
#define XSBEDR_BCR_EX_0UT0  0x00100000 // ext.board output
#define XSBEDR_BCR_EX_0UT1  0x00200000 // ext.board output
#define XSBEDR_STATUS  __XSBEDR_REG((XSBEDR_FPGA_PHYS + 0x00000004))

#define XSBEDR_STATUS_3POS_SW1 0x00000001 //left  |
#define XSBEDR_STATUS_3POS_SW2 0x00000002 //right |--3 pos switch value
#define XSBEDR_STATUS_3POS_SW3 0x00000004 //push  |
#define XSBEDR_STATUS_SW1  0x00000008 //switch 1 - push: 0
#define XSBEDR_STATUS_SW2  0x00000010 //switch 2 - push: 0
#define XSBEDR_STATUS_SW3  0x00000020 //switch 3 - push: 0
#define XSBEDR_STATUS_DIP_DATA 0x00000040 //DIP switch DIP_DATA bit
#define XSBEDR_STATUS_CF_BVD1 0x00000080 //read CF_BVD1 terminal status
#define XSBEDR_STATUS_CF_BVD2 0x00000100 //read CF_BVD2 terminal status
#define XSBEDR_STATUS_CF_DETECT 0x00000200 //Detect CF card:1
#define XSBEDR_STATUS_MMC_WP 0x00000400 //MMC WP terminal status. low at lock
#define XSBEDR_STATUS_MMC_DETECT 0x00000800 //Detect MMC card:1
#define XSBEDR_STATUS_nSIM_DETECT 0x00001000 //Detect SIM card:0
#define XSBEDR_STATUS_nEXB_PRES 0x00002000 //Connect with extension board:0
#define XSBEDR_STATUS_EX_IN0 0x00004000 //Read input signal from ext. board
#define XSBEDR_STATUS_EX_IN1 0x00008000 //Read input signal from ext. board
//-----------------------------------
//  Board Config register opration
//-----------------------------------

#define XSBEDR_BCR_SETBIT(x){\
xsbase270edr_bcr |=x;\
XSBEDR_BCR = xsbase270edr_bcr;\
}
#define XSBEDR_BCR_CLEARBIT(x){\
xsbase270edr_bcr &=~(x);\
XSBEDR_BCR = xsbase270edr_bcr;\
}

#define XSBEDR_RED_LED_ON\
XSBEDR_BCR_SETBIT(XSBEDR_BCR_REDLED)

#define XSBEDR_RED_LED_OFF\
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_REDLED)

#define XSBEDR_GREEN_LED_ON\
XSBEDR_BCR_SETBIT(XSBEDR_BCR_GRELED)

#define XSBEDR_GREED_LED_OFF\
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_GRELED)

#define XSBEDR_LCD_PWR_ON \
XSBEDR_BCR_SETBIT(XSBEDR_BCR_LCD_PWR_ON)

#define XSBEDR_LCD_PWR_OFF \
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_LCD_PWR_ON)

#define XSBEDR_MMC_PWR_ON \
XSBEDR_BCR_SETBIT(XSBEDR_BCR_MMC_PWR_ON)

#define XSBEDR_MMC_PWR_OFF \
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_MMC_PWR_ON)
//LAN91C1111
#define PXA270XSB_ETH_BASE 0x0c000300
#define PXA270XSB_ETH_GPIO_ETH 10
#define PXA270XSB_IRQ_GPIO_ETH IRQ_GPIO(10)

 

3、在drivers/mtd/maps目录中增加一个xsbase270-flash.c文件

/*

* $Id:  $
*
* Map driver for the Mainstone developer platform.
*
* Author: Nicolas Pitre
* Copyright: (C) 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>

#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>

#include <asm/io.h>
#include <mach/hardware.h>
#include <mach/pxa-regs.h>
#include <mach/xsbase270.h>

#include <asm/cacheflush.h>

#include <asm/mach/flash.h>

#define ROM_ADDR 0x00000000
#define FLASH_ADDR 0x04000000

#define WINDOW_SIZE  32*1024*1024

static void xsbase270_map_inval_cache(struct map_info *map, unsigned long from,
ssize_t len)
{
// consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
flush_ioremap_region(map->phys,map->cached,from,len);
}

static struct map_info xsbase270_maps = {
.name=  "flash0",
.size =  WINDOW_SIZE,
.phys =  PXA_CS0_PHYS,
.bankwidth= 4,
.inval_cache =  xsbase270_map_inval_cache,
};

static struct mtd_partition xsbase270_partitions[] = {
{

.name =         "boot",
.size =         0x00040000,
.offset =       0,
.mask_flags =   MTD_WRITEABLE  /* force read-only */
},{
.name =         "param",
.size =         0x00040000,
.offset =       0x00040000,
},{
.name =         "Kernel",
.size =         0x00300000,
.offset =       0x00080000,
},{
.name =         "rootfs",
.size =         0x00f00000,
.offset =       0x00380000,
},{
.name =         "appfs",
.size =         MTDPART_SIZ_FULL,
.offset =       0x01280000,
}
};

static struct mtd_info *mymtds;
static struct mtd_partition *parsed_parts;
static int nr_parsed_parts;

static const char *probes[] = { NULL };

static int __init init_xsbase270(void)
{
int ret = 0, i;

//xsbase270_maps.bankwidth = 4;

/* Compensate for SW7 which swaps the flash banks */
//xsbase270_maps.name = "Emdoor flash";

printk(KERN_NOTICE "EEliod configured to boot from %s\n", xsbase270_maps.name);

xsbase270_maps.virt = ioremap(xsbase270_maps.phys, WINDOW_SIZE);
if (!xsbase270_maps.virt) {
printk(KERN_WARNING "Failed to ioremap %s\n", xsbase270_maps.name);
//if (!ret)
//ret = -ENOMEM;
// continue;
}
xsbase270_maps.cached = ioremap_cached(xsbase270_maps.phys, WINDOW_SIZE);
if (!xsbase270_maps.cached)
printk(KERN_WARNING "Failed to ioremap cached %s\n",  xsbase270_maps.name);

simple_map_init(&xsbase270_maps);

printk(KERN_NOTICE
"Probing %s at physical address 0x%08lx"
" (%d-bit bankwidth)\n",
xsbase270_maps.name, xsbase270_maps.phys,
xsbase270_maps.bankwidth * 8);

mymtds = do_map_probe("cfi_probe", &xsbase270_maps);

if (!mymtds) {
iounmap((void *)xsbase270_maps.virt);
if (xsbase270_maps.cached)
iounmap(xsbase270_maps.cached);
//  if (!ret)
//   ret = -EIO;
// continue;
}
/* Unlock the flash device. */
for (i = 0; i < mymtds->numeraseregions; i++) {
int j;
for( j = 0; j < mymtds->eraseregions[i].numblocks; j++) {
mymtds->unlock(mymtds, mymtds->eraseregions[i].offset +
j * mymtds->eraseregions[i].erasesize,
mymtds->eraseregions[i].erasesize);
}
}

mymtds->owner = THIS_MODULE;

ret = parse_mtd_partitions(mymtds, probes, &parsed_parts, 0);

 

if (ret > 0)
nr_parsed_parts = ret;

 


if (!mymtds) {

 

printk(KERN_WARNING "%s is absent. Skipping\n",
xsbase270_maps.name);
return ret;
}
else if (nr_parsed_parts) {
add_mtd_partitions(mymtds, parsed_parts,
nr_parsed_parts);
} else  {
printk("Using static partitions on %s\n",
xsbase270_maps.name);
add_mtd_partitions(mymtds, xsbase270_partitions,
ARRAY_SIZE(xsbase270_partitions));
}
return 0;
}

 

static void __exit cleanup_xsbase270(void)
{
//int i;
//for (i = 0; i < 2; i++) {
// if (!mymtds)
//  continue;

if (nr_parsed_parts)
del_mtd_partitions(mymtds);
else
del_mtd_device(mymtds);

 

map_destroy(mymtds);
iounmap((void *)xsbase270_maps.virt);
if (xsbase270_maps.cached)
iounmap(xsbase270_maps.cached);
kfree(parsed_parts);
//}
}

 

module_init(init_xsbase270);
module_exit(cleanup_xsbase270);

 

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>");
MODULE_DESCRIPTION("MTD map driver for Intel Mainstone");

 

 

4、修改arch/arm/mach-pxa/include/mach/irqs.h文件,增加EELiod平台的对中断向量的定义

 在最后一行“#endif /* __ASM_MACH_IRQS_H */”前添加下列内容:
/* xsbase270 irqs */
#define XSBEDR_USBWAKE_IRQ      IRQ_GPIO(1)
#define XSBEDR_USB2_IRQ IRQ_GPIO(9)
#define XSBEDR_ETH_IRQ  IRQ_GPIO(10)
#define XSBEDR_CF_DETECT_IRQ    IRQ_GPIO(12)
#define XSBEDR_AC97_IRQ IRQ_GPIO(13)
#define XSBEDR_CF_IRQ   IRQ_GPIO(22)

 #define XSBDVK_IRQ(x)   (IRQ_BOARD_START + (x))

#define XSBDVK_ETH_IRQ  IRQ_GPIO(10)
#define XSBDVK_2700G_IRQ        IRQ_GPIO(12)
#define XSBDVK_AC97_IRQ IRQ_GPIO(13)
#define XSBDVK_CF_IRQ   IRQ_GPIO(22)

#define XSBDVK_MMC_IN_IRQ       XSBDVK_IRQ(0)
#define XSBDVK_MMC_OUT_IRQ      XSBDVK_IRQ(1)
#define XSBDVK_SIM_IN_IRQ       XSBDVK_IRQ(2)
#define XSBDVK_SIM_OUT_IRQ      XSBDVK_IRQ(3)
#define XSBDVK_USB_IN_IRQ       XSBDVK_IRQ(4)
#define XSBDVK_USB_OUT_IRQ      XSBDVK_IRQ(5)
#define XSBDVK_CF_IN_IRQ        XSBDVK_IRQ(6)
#define XSBDVK_CF_OUT_IRQ       XSBDVK_IRQ(7)
#define XSBDVK_SW1_IRQ          XSBDVK_IRQ(8)
#define XSBDVK_SW2_IRQ          XSBDVK_IRQ(9)
#define XSBDVK_SW3_IRQ          XSBDVK_IRQ(10)
#define XSBDVK_SW4_1_IRQ        XSBDVK_IRQ(11)
#define XSBDVK_SW4_2_IRQ        XSBDVK_IRQ(12)
#define XSBDVK_SW4_3_IRQ        XSBDVK_IRQ(13)

 


 

第四部分:编译

# cd /usr/local/arm/source/linux-2.6.28
# make O=../BUILD/linux-2.6.28 xsbase270_defconfig

# make O=../BUILD/linux-2.6.28 menuconfig

注意:如果编译出错,那么参见附录1处理

配置如下参数:
1、CONFIG_CMDLINE="console=ttyS0,115200 mem=64M rw root=/dev/nfs nfsroot=200.200.200.2:/srv/rootfs init=/sbin/init ip=200.200.200.3:200.200.200.2:200.200.200.2:255.255.255.248:Target:eth0:off "

注意:参数串中一定是ttyS0,而不是ttyS1等,因为内核是在开发箱里运行的,而开发箱只有一个串口ttyS0。同时静态配置开发箱网卡参数:
ip=<开发箱ip地址>:<服务器ip地址>:<网关>:<网络掩码>:<机器名字>:<网卡名字>:<是否自动配置网卡参数>,更详细到介绍请查看内核源码树下到文件Documentation/filesystems/nfsroot.txt 

2、CONFIG_MACH_XSBASE270=y
3、CONFIG_PXA27x=y
4、CONFIG_SMC91X=y

5、MTD_XSBASE270=y
# make O=../BUILD/linux-2.6.28 zImage

如果编译没错,编译后的内核位于arch/arm/boot目录下。

第五部分:烧写

#  mkdir /usr/local/arm/tools && cd /usr/local/arm/tools
# cp  /usr/local/arm/source/u-boot-1.3.3/tools/mkimage  .
# cp /usr/local/arm/source/BUILD/linux-2.6.28/arch/arm/boot/zImage  .
# ./mkimage -A arm -O linux -T kernel -C none -n linux-2.6.28-xsbase270 -a 0xa0008000 -e 0xa0008040 -d zImage uImage

注意:-a参数指定的地址是内核从FLASH中加载到内存的地址,-e参数指定的地址是内核开始执行的地址。uImage的前64个字节是u-boot启动内核前需要用到的,真正的内核入口就是从第65个字节开始的。

# apt-get -y install tftpd tftp
# mkdir /srv/tftp
# chown -R nobody /srv/tftp/
# cp uImage /srv/tftp

通过minicom连接到开发箱,然后:
$ tftp 0xa0008000 uImage        //把内核下载到开发板内存,注意下载的内核大小(十六进制表示)
$ bootm 0xa0008000            //直接启动内核,也可以采用下面的方法烧写到flash中并重启开发箱(下载到0xa0008000位置的原因,参见前面的“7 确认内核链接地址”部分)
$ protect off all
//关闭flash写保护
$ era 0x80000 0x37ffff //删除内核分区(参见flash分区信息)
$ cp.b 0xa0008000 0x80000 0x180000 //0x13fdd0是内核的大小(上面采用tftp下载内核后会返回内核的大小)
$ imi 0x80000                   //校验内核的格式
$ protect on all //打开FLASH写保护,此后不能写了
$ reset //重启

附录1:编译时报错“arm-linux-ld: no machine record defined”
原因:这是arm-linux-ld的版本低于ld的版本,采用arm-linux-ld  --version和ld --version可以查看相应的版本号
处理:vim arch/arm/kernel/vmlinux.lds跳到文件尾部,把如下两行注释掉(用/* */):
ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")

附录2:在u-boot中执行内核时报错

starting kernel ...
Uncompressing Linux.............................................................
Error: unrecognized/unsupported machine ID (r1 = 0x00000261).
Available machine support:
ID (hex)              NAME
00000475        EELIOD (XSBASE270EDR) Development Platform
Please check your kernel config and/or bootloader.
处理:
配置内核时要指定内核即将运行的硬件平台(make menuconfig -->System Type-->下及子菜单下选择)对应的配置变量是CONFIG_MACH_XXXXX,XXXXX就是硬件平台,比如亿道的xsbase270开发板就是CONFIG_MACH_XSBASE270=y(选中菜单:make menuconfig -->System Type-->Intel PXA2xx/PXA3xx Implementations-->Emdoor EELiod/Liod Development Platform),而硬件平台ID号在文件arch/arm/tools/mach-types中定义,比如:
# machine_is_xxx       CONFIG_xxxx                     MACH_TYPE_xxx           number
xsbase270       MACH_XSBASE270      XSBASE270       1141
U-boot也定义了一个硬件平台号(在include/asm-arm/mach-types.h中定义),调用内核时通过r1传递给内核,内核执行时首先会比较这两个号,如果不等就报上面的错误。内核这边的硬件平台号是这样确定的:编译内核时首先由文件arch/arm/tools/mach-types生成头文件include/asm-arm/mach-types.h,该文件(定义许多宏,如:#define MACH_TYPE_XSBASE270            1141,并针对每个平台配置项定义宏machine_arch_type)。对于xsbase270开发板,解决办法是首先查看.config文件中有没有配置项CONFIG_MACH_XSBASE270=y --> 查看文件arch/arm/tools/mach-types中有没有定义XSBASE270硬件平台id号 --> 这个ID号是否与u-boot定义的一样(查看u-boot源码树下的文件include/asm-arm/mach-types.h中定义的宏MACH_TYPE_XSBASE270) --> 查看u-boot源码树下的文件board/xsbase270/xsbase270.c中的语句gd->bd->bi_arch_number = MACH_TYPE_XSBASE270

 

附录3:内核烧到flash中,然后启动开发箱并进入加载模式,启动时报错:

Wrong Image Format for bootm command
ERROR: can't get kernel image!
处理:
1)、检查内核移植时定义的flash分区表(文件linux/arch/arm/mach-pxa/xsbase270.c):

0x00000000-0x00040000 : "boot"
0x00040000-0x00080000 : "param"
0x00080000-0x00380000 : "Kernel"
0x00380000-0x01280000 : "rootfs"
0x01280000-0x02000000 : "appfs"

从上面的分区表可以看出内核是要烧写到flash的位置是 0x00080000-0x00380000

2)、检查u-boot默认启动内核到命令(文件include/configs/xsbase270.h):

#define CONFIG_BOOTCOMMAND      "run boot_flash"
这条语句说明u-boot默认启动内核到命令是run boot_flash,那么我们在这个文件中继续查询boot_flash的定义:

"boot_flash=" \
"cp.b 0x80000 0xa0008000 0x300000; " \
"bootm 0xa0008000\0" \

即先把内核从flash的0x80000读到内存0xa0008000到位置,然后直接0xa0008000处到代码

3)、检查内核移植时到转换命令(zImage --> uImage):
./mkimage -A arm -O linux -T kernel -C none -n linux-2.6.28-xsbase270 -a 0xa0008000 -e 0xa0008040 -d zImage uImage
此命令说明内核要读到内存的0xa0008000位置去执行。

 

我已经做好的内核补丁从这里可以下载,然后采用如下命令打补丁:
rm -rf  linux-2.6.28
tar -xjf  linux-2.6.28.tar.bz2
bzip2 -d linux-2.6.28_xsbase270.patch.bz2
cd linux-2.6.28
patch -Np1<../linux-2.6.28_xsbase270.patch

 

 

http://blog.csdn.net/feihongwang/article/details/6977931

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  • Edison Endler 回应于2011/10/10 10:39 回复TA

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  • 羊咩咩 回应于2012/07/31 08:59 回复TA

    您好,小弟來自台灣,正在念碩士班。
    小弟最近在幫大學部的學弟研究如何將XSBase 270移植Linux 2.6.28核心
    因此找到您的文章

    小地遵照您的步驟建立核心的相關設定
    但是下載到開發板中出現 Starting Kernel... 就停止不動了
    請問會發生上述情況是哪邊配置錯了呢?

    另外想跟您索取 XSBase270 移植 Linux 2.6.28 會涉及到的文件,不知是否能夠提供給小弟呢?

    • 开源盛世 回应于2012/08/04 15:13 回复TA

      我也遇到这个问题,一直没有解决呢,如果你解决了,别忘了告诉我一声啊

      • 开源盛世 回应于2013/04/20 03:58 回复TA

        @开源盛世: 已经解决了,是u-boot的内存配置寄存器设置不当造成了,请参考本博客的u-boot移植

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